– New Speedster7t family optimized for machine-learning and high-bandwidth networking applications
– Architecture and ACE software tools enables a new paradigm for design with higher performance and shorter design cycles
– Speedster7t devices manufactured on TSMC’s 7nm FinFET process
SANTA CLARA, California, May 21, 2019 /PRNewswire/ — Achronix Semiconductor Corporation, a leader in FPGA-based hardware accelerator devices and high-performance eFPGA IP, today introduced an innovative, new FPGA family, to meet the growing demands of artificial intelligence/ machine learning (AI/ML) and high-bandwidth data acceleration applications. The Achronix Speedster®7t family – based on a new, highly optimized architecture – goes beyond traditional FPGA solutions featuring ASIC-like performance, FPGA adaptability and enhanced functionality to streamline design.
Specifically designed for AI/ML and high-bandwidth workloads, the Speedster7t FPGA family features a revolutionary new 2D network-on-chip (NoC), and a high-density array of new machine learning processors (MLP). Blending FPGA programmability with ASIC routing structures and compute engines, the Speedster7t family creates a new “FPGA+” class of technology.
As use cases for AI/ML are rapidly evolving, new solutions are required to address the varying requirements of high performance, flexibility and time to market. As a result, Semico Research Corp. forecasts the market size for FPGAs in AI applications will grow by 3x in the next four years to $5.2 billion.
“We are at the beginning of a high-growth phase of intelligent, self-learning computation that will have broad impacts on all aspects of our daily lives,” said Robert Blake, President and CEO of Achronix Semiconductor. “The Speedster7t family is the most exciting announcement in the history of Achronix, representing innovation and learning across four architectural generations of hardware and software development and close cooperation with our lead customers. The…